This invention relates to a semiconductor memory device and relates to a technique that is effectively used for static RAMs in which high speed write and read operations are primarily performed.
Japanese Patent Application Laid-Open No. 2006-004463 relates to a static RAM arranged to detect a write delay by using write dummy cells and/or detect a read delay by using read dummy cells and terminate a write operation and/or a read operation.
[Patent Document 1]
Japanese Patent Application Laid-Open No. 2006-004463